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    題名: Fixed-Point Acceleration of Square Root and Logarithm Using Quadratic Regression for HTK Kernel Modules
    作者: Chou, Chih-Hung
    Lin, Po-Chuan
    Wang, Jhing-Fa
    林博川
    (東方設計學院電子與資訊系)
    貢獻者: 東方設計學院電子與資訊系
    日期: 2011-12-13
    上傳時間: 2015-07-14 14:27:44 (UTC+8)
    出版者: Shenzhen, China
    摘要: This paper proposes a low-computation algorithm for logarithm and square-root in fixed-point domain. The algorithm only needs 3 ~ 6 coefficients to do inner-product of vectors which have three elements. Each computation only needs three fixed-point multiplications and two fixed-point additions to accomplish logarithm and square-root operations. According to the experimental results, the relative error is less than 0.075% and 0.6% for square-root and logarithm operation, respectively. Comparing with the CORDIC algorithm, the proposed algorithm can provide the same precision and save 4 ~ 7 times additions, 33 ~ 40% lookup table operations, and 33% ~ 40% memory requirements, that indicates that the proposed algorithm is more efficient and appropriate for IC design.
    關聯: The fourth international conference on genetic and evolutionary computing conference program, pp.602-605
    顯示於類別:[電子與資訊系(遊戲動畫系、動畫科)] 會議論文

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